 TC358748XBG |
 TC358748XBG internal view |
WHAT IS TC358748XBG?
TC358748XBG is a bridge device that converts MIPI data transfers from devices such as a camera to an application processor over a Parallel port interface. . All internal registers can be access through I2C or SPI (in CSI out case only).It is a mobile peripheral device.
PINS CONFIGURATION
TC358748XBG Pins Configuration
TC358748XBG Pins Configuration
HOW TO USE TC358748XBG？
There are several system configurations where TC358748XBG are typically be used
- CSI-2 TX with Parallel Input mode for Analog TV, Tele-presence Type, and Specialty/Older Cameras application. In this mode, TC358748XBG (Parallel to CSI-2 converter) is a bridge device that converts parallel data transfers to an application over a MIPI CSI-2 interface. Toshiba Bridge Chip provides a low power bridge solution to efficiently translate parallel transfers to serial transfers.
- CSI-2 RX with Parallel output mode for scanner application. In this mode, TC358748XBG (CSI-2 to Parallel converter) is a bridge device that converts serial data transfers from devices such as a camera to an application processor over a parallel interface. Toshiba Bridge Chip provides a low power bridge solution to efficiently translate serial transfers to parallel transfers.
TC358748XBG application
Below are the main features supported by TC358748XBG.
FEATURES OF TC358748XBG
- CSI-2 TX/RX Interface
² MIPI CSI-2 compliant (Version 1.01 Revision 0.04 – 2 April 2009) ² Configurable to TX or RX controller ² Supports up to 1Gbps per data lane ² Supports up to 4 data lanes ² Supports video data formats – RX: RAW8/10/12/14, YUV422 (CCIR/ITU 8/10-bit), RGB888/666/565 and User-Defined 8-bit – TX: YUV422 (CCIR/ITU 8/10-bit), YUV444, RGB888/666/565 and RAW8/10/12/14
- Parallel Port Interface
² Supports data formats – 24-bit bus – un-packed format (Both Input and Output mode) Ø RGB888/666/565, RAW8/10/12/14 and YUV422 8-bit (on 8/16-bit data bus) and 10-bit data formats. Ø YUV444 (Parallel Input mode only) – YUV422 8-bit – ITU BT.656 and ITU BT.601 (Parallel input mode only) ² Up to 100 MHz PCLK frequency for Output mode, and 166 MHz for Input mode.
- I2C Slave Interface (CS = L)
² Support for normal (100 kHz), fast mode (400 kHz) and special mode (1 MHz) ² Configure all TC358746AXBG/TC358748XBG internal registers
- SPI Slave Interface (Only applicable in CSIOut configuration, MSEL = H, and CS = H
² SPI interface support for up to 25 MHz operation. ² Configure all TC358746AXBG/TC358748XBG internal registers
- GPIO signals
² 3 GPIO signals – Three GPIO signals can be configured as control signals (MCLK, CXRST, XShutdown) for CSI-2 RX device. – Or one GPIO signal can be configured as INT signal for Parallel interface.
- System ²Clock and power management support to achieve low power states.
- Power supply inputs ²Core and MIPI D-PHY: 1.2 V ² I/O: 1.8 V – 3.3 V
TC358748XBG PACKAGE AND ITS LAYOUT
TC358748XBG Package
TC358748XBG layout
PINS DETAILS
TC358748XBG basically has the 100 pins
a. It has 25 VSS pins which are basically used to give the source voltage which has range of 1.1 to 5 V to the MIPI circuit.
b. It has 9 VDDIO pins which are connected with the MIPI device which are in mobile phone.
c. Other pins are also basically use to connect the camera of your device to the TC358748XBG by the lane with the MIPI circuit.
TC358748XBG RELATED PRODUCTS PRICE
Parts Mfr. Description Stock Prices Buy Now
TC358748XBG Toshiba CMOS MIPI CSI-2 TO PARALLEL 1000 $3.163 Lowest 
TC358746XBG Toshiba 30000 $2.426 Lowest 
TC358743XBG Toshiba 150000 $3.310 Lowest 
TC358746AXBG Toshiba 12300 $1.594 Lowest 
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