What should you watch out for when using a select signal assignment statement in VHDL?

(1) It is only possible to assign the value of the expression preceding the selection condition to the target signal when the value of the selection conditional expression satisfies a certain selection condition.

(2) The expression in the selection signal assignment statement is followed by the when clause.

(5) The selection condition in the selection signal assignment statement does not allow for the case of incomplete coverage.