Ten Daily Electronic Common Sense-Section 77

What basic operations will the 28X core perform when executing an instruction?

Fetch instructions from program memory; decode instructions; read data from memory or central processing unit (CPU) registers; execute instructions; write results to memory or central processing unit (CPU) registers.

What is the piezoresistive coefficient?

The relative change of semiconductor resistance is approximately equal to the relative change of resistivity, and the relative change of resistivity is proportional to the stress, and the proportional coefficient of the two is the piezoresistive coefficient.

What are the ETFC features?

The user side of the single board supports 12 FE interfaces; the system side of the single board supports 2 GE interfaces; the single board provides FE service access for the processing board; the GE interface on the system side of the single board supports active/standby selection; the single board supports hot swapping ; The single board supports a 48V system power supply.

When multiple pins are simultaneously set to the same external interrupt, what is the external interrupt logic based on the mode bit and polarity bit?

The external interrupt logic is handled as follows: In the low-level trigger mode: the states of all pins that select the EINT function are connected to a positive logic “AND” gate, that is, an interrupt occurs when a low-level signal occurs on any input pin; In the horizontal trigger mode: the states of all pins that select the EINT function are connected to a positive logic “OR” gate, that is, an interrupt occurs when a high level signal occurs on any input pin; in the edge trigger mode: multiple pin input. If there is a multi-pin input, the pin with the lowest GPIO port number is used, regardless of the pin’s polarity setting. Selecting the use of multiple EINT pins in edge-triggered mode is considered a programming error. When multiple EINT pins are logical OR, if an interrupt occurs, the pin state can be read from the GPIO port through the IoOPIN and Io1PIN registers in the interrupt service routine to determine the pin that generated the interrupt.

What is the speed at which the system responds to each interrupt?What is the speed at which the system responds to each interrupt?

• This problem depends on 4 factors:
  1. the maximum time that the interrupt is disabled;
  2. the execution time of the interrupt program of any interrupt with a higher priority;
  3. the CPU stops the current task, saves the necessary information, and executes the instructions in the interrupt program, The time that this process takes;
  4. the time from the interrupt program to save the context to the completion of a response.

What are the model naming methods for humidity sensitive Resistorss?

• The model name of the humidity sensitive resistor can be divided into three parts.
  • The first part uses letters to indicate the subject.
  • The second part uses letters to indicate uses or characteristics.
  • The third part uses numbers to indicate the serial number. Model Nomenclature and Meaning of Humidity Resistors Part 1: Main Name Part 2: Use or Features Part 3: Serial Number And performance parameters, general type, control temperature, use to measure humidity, such as: (general type humidity sensitive resistor) – sensitive resistor – humidity sensitive resistor – serial number

What is the purpose of the parametric test of the COS functional test?

Verify that each command returns the expected error code with the wrong argument.

What is the design procedure for the LM5080?

1. Select the appropriate sampling resistance value.
2. In the reference adjustment and feedback adjustment modes, it is necessary to decide whether to raise the transconductance.
3. Selecting a suitable capacitor for CTR0 can provide compensation for the current sharing loop.
4. In remote sensing mode, if RTRO>100f2, in order to keep the error amplifier stable, another CTRo capacitor (about 2nF) should be added between TR0 and CSP.

What assumptions are based on the LPHU algorithm?

1. Through the GPS system and related positioning algorithms, a node can obtain its own location information, and broadcast the location information in its one-hop neighbors by broadcasting when the nodes meet.
2. Nodes take advantage of every communication opportunity to actively collect historical information about encounters between nodes.
3. The node moves slowly and is only active in a local range, that is, its position is relatively stable relative to the entire application scene.
4. When the message is successfully delivered, the destination node broadcasts the confirmation packet to the entire network, and the node that receives the confirmation information actively discards the copy of the message.

What factors have caused the difference between the WirelessHART standard and the OSl model?

1. Power supply Power consumption is a major issue that needs to be considered in embedded systems. WirelessHART field devices are usually battery powered, so supporting the full layer 7 stack is not the best solution.
2. Speed and size The processor and memory size of embedded systems are usually small. Therefore, implementing a complete OSl 7-layer protocol stack is not an ideal solution.
3. Safety. The OSl model started in the 1970s. At the time, safety was considered an important factor, but not the most important factor. Today, security has become the most important factor in the network. As a result, many very sophisticated security technologies have been developed. WirelessHART adopts 128-bit encryption algorithm and CCM authentication algorithm in both data link layer and network layer.
4. Another important requirement in real-time embedded systems is the guaranteed delivery of network data. Based on this, the WirelessHART standard adopts the TDMA mechanism and the synchronization of the whole network. All protocol stacks in WirelessHART networks define time parameters.