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  • Ten Daily Electronic Common Sense-Section 53

    Brief description of the active array structure?

    For a single-tube RRAM memory device, when the RRAM resistive memory is converted from a high-resistance state to a low-resistance state, a limiting current is usually applied across the device.
    Mainly because after the RRAM memory device transitions from a high resistance state to a low resistance state, the current flowing through the device suddenly increases. If a certain limiting current is not set at both ends of the device, it will cause permanent breakdown of the device. In order to realize the current limiting of the RRAM memory device during the transition from the high resistance state to the low resistance state, the magnitude of the limiting current can be controlled by means of an external transistor or an external resistor.
    When using an external resistor, the size of the external resistor cannot be changed. It is not conducive to adjusting the size of the current limiting value. However, using an external transistor usually introduces a current overshoot phenomenon, which is the so-called current limiting effect problem. In our commonly used semiconductor test instrument Keithley 4200-SCS, a transistor is built in for current limiting. However, in this way of limiting the current, there is also a phenomenon of current limiting failure. That is, when the current limit is small (<1mA), the reset current (RESET current) required for the transition of the device from the low resistance state to the high resistance state is generally maintained at about 1mA, and will not decrease with the reduction of the limiting current. This current-limiting failure is extremely unfavorable to the low power consumption requirement of the resistive memory, and the excessive reset current will reduce the ability of the device to repeatedly erase and write, and affect the life of the device.
    Typically, the magnitude of the reset current is determined by the value of the resistance in the low-resistance state, and the larger the resistance in the low-resistance state, the smaller the reset current required to convert it back to the high-resistance state. According to Ohm’s law, the smaller the limiting current, the larger the resistance value of the low resistance state should be. The essence of the current limiting failure is that when the applied limiting current decreases, the resistance value of the low resistance state does not increase with the decrease of the limiting current.
    Therefore, the influence of parasitic capacitance on the current cannot be avoided whether using the built-in transistor of the test instrument or an external transistor. In the case of small current limiting, the parasitic capacitance has a greater influence on the current, resulting in the effective current limiting. In order to avoid the current limiting effect, a field effect transistor and a resistive memory are integrated in series to form a 1T1R structure, the so-called active structure. Using the 1T1R active integrated structure can effectively reduce the parasitic capacitance, thereby avoiding the current overshoot phenomenon caused by the parasitic capacitance.

    Physically, what parts does the USB interface technology consist of?

    • Physically, the USB interface technology consists of 3 parts:
      1. It is a PC system with a USB interface;
      2. It is system software that supports USB interface;
      3. It is a device using the USB interface.

    The power sequence is often implemented in a cascaded way. What is wrong with this approach?

    1. Under the premise of not violating the respective E-power and power-off sequences of each component, it is difficult to achieve power synchronization on the entire PCB. Therefore, this requires the use of resistors and capacitors in the design to delay the power-up of a given supply. These resistive, electrical values can only be determined by trial and error, a process that is time consuming and produces results that are neither flexible nor scalable.
    2. Designers have to use many off-the-shelf circuits to monitor all the power supplies on the board, and to generate the final monitoring signals such as power-off interrupts, power-on resets, etc., additional logic gates are required to implement.
    3. Few focus on the processing of power-off sequence today.
    4. It is very difficult to realize power management that can be extended to add-on cards.

    What is the detection method for the lean gas sensor?

    • Check the sensor heater resistance: put the ignition switch to “OFF”, unplug the sensor wire connector; use a multimeter to measure the resistance between the heater terminal and the ground terminal in the sensor terminal, and the resistance value Should meet the standard value (usually 4 ~ 40Q). If it does not meet the standard, the oxygen sensor should be replaced.
    • Check the output current signal of the sensor: use the current block of the multimeter to test the output current signal of the sensor, and the current value should increase with the increase of the air-fuel ratio.

    Application of three basic circuits of amplifier circuit and selection of its parameters:

    The application of the three basic circuits of the amplifier circuit and the selection of its parameters The three basic circuits of the amplifier circuit include a common emitter circuit, a common base circuit, and a common collector circuit.
    The output impedance of the common emitter circuit is high, and it is generally used as an intermediate stage of multi-stage amplification. The output impedance of the common collector circuit is low, and it is also called a voltage follower. Generally used as input stage, output stage, and buffer stage.
    Common collector amplifier circuit features: (1) There is current amplification, but no voltage amplification; (2) The polarity of the input voltage and the polarity of the output voltage are in phase; (3) The input resistance is large and the output resistance is small. The large input resistance can make the current flowing through the signal source small; the small output resistance means that the load capacity is large. Commonly used for input and output stages that amplify current.
    The output impedance of the common base is high, and it is also called a current follower. It is generally used as a high frequency or broadband circuit and a constant current source circuit. The characteristics of several basic amplifier circuits: configuration voltage gain current amplification input resistance (Ri) output resistance (Ro) application conditions common emission amplifier circuit is large, and the inversion of Vo has moderate current amplification, the frequency band is narrow, often used as a low frequency The amplifying unit circuit collectively collects the amplifying circuit. In the same phase as Vo, it has the characteristics of voltage following, and has the maximum and minimum current amplification. The input and output stage common-base amplifier circuits commonly used for voltage amplification are larger, and the same phase as Vo has no current amplification. Among the three configurations, its frequency characteristic is the best, and it is often used in broadband amplifier circuits. As for the selection of transistors and the selection of resistors and capacitors in the circuit, it is not particularly clear.

    What are the characteristics of the SPI module?

    4 external pins. Two operating modes: master and slave. Baud Rates: 125 different editable rates. Data word length: 1 to 16 data bits. Includes 4 timing mechanisms for simultaneous receive and transmit operations. Transmitter and receiver operations are accomplished through interrupt-driven or polling algorithms. Control registers of 9 SPI modules, 4-level send/receive FIF0 registers. Delayed transmit control to support bidirectional 3-wire SPI mode.

    What are the characteristics of the S6E63D6?

    1. 240RGB×320 pixel AMOLED display controller/driver IC, displaying 260,000 colors.
    2. 18/16/9/8 high-speed parallel bus is connected to l:I (80 or 68 series).
    3. Serial peripheral interface, 18/16/6-bit RGB interface.
    4. Mobile display digital interface support.
    5. Internal RAM capacity: 240×18×320bit=1382400bit.
    6. 240 source drive, 64 gray levels.
    7. I/O power supply l. 65V-3.3V, power supply 2.5V ~ 3.3V.

    How do I configure the FPGA using Boundary Scan mode (JTAG mode)?

    First connect the USB cable to the breadboard, then connect the board to power. Double-click the Configure Device (iMPACT) option in the Project Navigator. If the breadboard is connected successfully, the iMPACT software will automatically recognize the 3 devices in the JTAG programming file. If not prompted, click the first component, Spartan-3E FPGA, to highlight it. And click the right mouse button, select Assign New Configuration File in the pop-up shortcut menu, select the appropriate FPGA configuration file and click the “0K” button. After selecting the new profile, right-click on the FPGA if the original FPGA profile was not using the default StartUp clock source. Select Program in the pop-up shortcut menu to start programming the FPGA. The iMPACT software provides progress reports during the programming process. Programming the FPGA directly takes less than a minute, depending on the PC’s USB interface speed and iMPACT settings. When the FPGA is successfully programmed, the iMPACT software prompts that the programming is successful. The Done pin LED on the breadboard will now light up. That is CCLK, iMPACT will issue a warning message. This warning message can be ignored. When downloading via JTAG, the iMPACT software must set the StartUp clock source to the TCKJTAG clock source.

    What are the main features of the NCP5009?

    The main features of NCP5009 are: the input voltage range is 2.7~6. OV; output voltage can be raised to 15V; quiescent current is typically 3.

    What is the IDEF0 construction method?

    1. Selection scope, viewpoint and purpose. Before starting to build a model, you should first determine the footing of the modeled object. It mainly includes to determine the scope of modeling, viewpoint and purpose. A scope treats the subject of the model as part of a larger system, describing the external interface. The boundary between the environment and the environment is distinguished, and the issues that need to be discussed in the model and those that should not be discussed in the model are identified. Viewpoint refers to the point of view from which the object to be modeled is viewed, and the various components involved in a defined scope: purpose refers to the determination of the intent of the model or the purpose of its communication, and the reason for the modeling. Such as function description, implementation design and operation. These three concepts guide and constrain the entire modeling process.
    2. Establish internal and external relationship diagram 1 – A-0 diagram. The first step in modeling is usually to create a diagram of the internal and external relationships—A. 0 figure. Draw a single box with the name of the activity in it. The name should summarize the entire contents of the described system. The data interface between the system and the environment is again represented by arrows entering and leaving the box. This graph determines the internal and external relationships of the entire model, defines the boundaries of the system, and forms the basis for further decomposition.
    3. Draw the top-level diagram. put A. The 0 diagram is decomposed into 3 to 6 main parts, and the A0 diagram is obtained, and the A0 diagram represents A. 0 shows the same range of information. A. The 0 diagram is the real top-level diagram of the model, it is the first and most important one, and structurally reflects the point of view of the model. The structure of the A-0 diagram clearly shows that A. 0 The meaning of the name of the box. than A. 0 Figure A lower-level graphic used to illustrate what each box in A-0 is trying to describe.
    4. Create a series of graphics. In order to form a graph structure, treat each box in A-0 as the same as A.0. 0 box is the same. That is, break them down into several main parts to form a new graph. The order of decomposition can be based on the following principles: ① keep the decomposition at the same level – uniform model depth; ② select according to the degree of difficulty. Start with the hardest part and choose a box to break down.
    5. Write a text description. Finally, each figure will be accompanied by a descriptive text description, which generally includes explanatory text and a glossary.


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